1. Field of the Invention
The present invention relates to information processing systems and, more specifically, to an input/output structure for an information processing system.
2. Discussion of the Prior Art
The two major tasks which must be performed by an information processing systems are the processing of information and the moving of information into and out of the system and most systems are structurally and operationally organized to reflect these operations. That is, such a system is comprised of internal information processing elements, such as CPUs and memories, and an internal system bus for communication between the internal elements, and an input/output (I/O) structure. The I/O structure normally includes an I/O bus connected from the internal system bus and a plurality of peripheral devices. Examples of peripheral devices include input/output devices such as disc drives, displays, printers, telecommunications links, tape streamers and user terminals. The peripheral devices may further include independent or associated processing units, such as other general purpose computers or specialized processing devices, such as scanners and specialized arithmetic or signal processors.
A recurring limitation on the performance of any information processing system is set by the capability of the I/O system. That is, how efficiently may the I/O system move information into the system to be processed, and processed information out of the system. A further, related problem is the amount of system resources and processing time which must be devoted to directing and controlling I/O operations. In addition, many systems are limited in their growth capability by the capacity of the system and I/O structure to add further peripheral devices and the needs of the system expand.
It is an object of the present invention to provide an improved I/O structure for an information processing system.
It is a further object of the present invention to provide an improved I/O structure allowing communication of data and messages among peripheral devices connected from the same I/O bus, among peripheral devices connected from different I/O busses, and between peripheral devices and the internal processing elements of the system.
It is a yet further object of the present invention to provide an improved intelligent interface controller for connecting peripheral devices to an I/O bus.